10進カウンタです。
7セグLEDで表示します。
33MHz / 2^24 Hz ≒ 1.97Hz でカウントします。
非同期リセットも入れてます。*1
-- 10 Counter with AsyncReset
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Counter10 is
port(
CLK : in std_logic; -- Osc: 33MHz
RESET : in std_logic;
LED_7SEG : out std_logic_vector(7 downto 0)
);
end Counter10;
architecture RTL of Counter10 is
signal DIV_COUNTER : std_logic_vector(24 downto 0);
signal DIV_CLK : std_logic;
signal COUNTER : std_logic_vector(3 downto 0);
begin
-- CLK
process(CLK,RESET)
begin
if (RESET = '0') then
DIV_COUNTER <= (others => '0');
elsif (CLK'event and CLK = '0') then
DIV_COUNTER <= DIV_COUNTER + 1;
end if;
end process;
DIV_CLK <= not DIV_COUNTER(23); -- 2Hz:(23)
-- 1Hz:(24) 4Hz:(22) 8Hz:(21)...
-- 10Counter with AsyncReset
process(DIV_CLK,RESET)
begin
if (RESET = '0') then
COUNTER <= (others => '0');
elsif (DIV_CLK'event and DIV_CLK='0') then
if (COUNTER = "1001") then
COUNTER <= (others => '0');
else
COUNTER <= COUNTER + 1;
end if;
end if;
end process;
-- 7seg LED Decoder
process(COUNTER)
begin
case COUNTER is
when "0000" => LED_7SEG <= "00000011"; -- 0
when "0001" => LED_7SEG <= "10011111"; -- 1
when "0010" => LED_7SEG <= "00100101"; -- 2
when "0011" => LED_7SEG <= "00001101"; -- 3
when "0100" => LED_7SEG <= "10011001"; -- 4
when "0101" => LED_7SEG <= "01001001"; -- 5
when "0110" => LED_7SEG <= "01000001"; -- 6
when "0111" => LED_7SEG <= "00011111"; -- 7
when "1000" => LED_7SEG <= "00000001"; -- 8
when "1001" => LED_7SEG <= "00001001"; -- 9
when others => LED_7SEG <= "01100001"; -- E
end case;
end process;
-- 7seg LED Decoder end
end RTL;
*1:しつこく書いていますが、リセット入力を回路に入れておくのは非常に重要です。